Quote:
Original Posted By
Asynchronous ►sama gan msh corei7
Spoiler
for march
[CODE]# gcc -c -Q -march=native --help=target
The following options are target specific:
-m128bit-long-double [disabled]
-m32 [disabled]
-m3dnow [disabled]
-m3dnowa [disabled]
-m64 [enabled]
-m80387 [enabled]
-m8bit-idiv [disabled]
-m96bit-long-double [enabled]
-mabi=
-mabm [disabled]
-maccumulate-outgoing-args [disabled]
-maes [disabled]
-malign-double [disabled]
-malign-functions=
-malign-jumps=
-malign-loops=
-malign-stringops [enabled]
-mandroid [disabled]
-march= corei7
-masm=
-mavx [disabled]
-mavx256-split-unaligned-load [disabled]
-mavx256-split-unaligned-store [disabled]
-mbionic [disabled]
-mbmi [disabled]
-mbranch-cost=
-mcld [disabled]
-mcmodel=
-mcpu=
-mcrc32 [disabled]
-mcx16 [enabled]
-mdispatch-scheduler [disabled]
-mf16c [disabled]
-mfancy-math-387 [enabled]
-mfentry [enabled]
-mfma [disabled]
-mfma4 [disabled]
-mforce-drap [disabled]
-mfp-ret-in-387 [enabled]
-mfpmath=
-mfsgsbase [disabled]
-mfused-madd
-mglibc [enabled]
-mhard-float [enabled]
-mieee-fp [enabled]
-mincoming-stack-boundary=
-minline-all-stringops [disabled]
-minline-stringops-dynamically [disabled]
-mintel-syntax
-mlarge-data-threshold=
-mlwp [disabled]
-mmmx [disabled]
-mmovbe [disabled]
-mms-bitfields [disabled]
-mno-align-stringops [disabled]
-mno-fancy-math-387 [disabled]
-mno-push-args [disabled]
-mno-red-zone [disabled]
-mno-sse4 [disabled]
-momit-leaf-frame-pointer [disabled]
-mpc
-mpclmul [disabled]
-mpopcnt [enabled]
-mprefer-avx128 [disabled]
-mpreferred-stack-boundary=
-mpush-args [enabled]
-mrdrnd [disabled]
-mrecip [disabled]
-mred-zone [enabled]
-mregparm=
-mrtd [disabled]
-msahf [enabled]
-msoft-float [disabled]
-msse [enabled]
-msse2 [enabled]
-msse2avx [disabled]
-msse3 [enabled]
-msse4 [enabled]
-msse4.1 [enabled]
-msse4.2 [enabled]
-msse4a [disabled]
-msse5
-msseregparm [disabled]
-mssse3 [enabled]
-mstack-arg-probe [disabled]
-mstackrealign [enabled]
-mstringop-strategy=
-mtbm [disabled]
-mtls-dialect=
-mtls-direct-seg-refs [enabled]
-mtune= corei7
-muclibc [disabled]
-mveclibabi=
-mvect8-ret-in-mem [disabled]
-mvzeroupper [disabled]
-mxop [disabled]
[/CODE]
apa krn di intruksi SSE4.1, SSE4.2 yah jd di set march=corei7 sm gcc
Ntar ane coba pake gcc spt yg agan pake. Soalnya di system ane cuman pake yg stable aja (4.4.6-r1 & 4.5.3-r2). Yg 4.6.3 mesti ane unmask dulu.
Penasaran aja, soalnya x86info juga ngedetek corei3 ane jd corei7.
[CODE]
0 root@edge: ~
Fri Jun 22, 08:14 # x86info -a
x86info v1.30. Dave Jones 2001-2011
Feedback to .
MP Table:
# APIC ID Version State Family Model Step Flags
# 0 0x15 BSP, usable 6 5 2 0xbfebfbff
# 4 0x15 AP, usable 6 5 2 0xbfebfbff
Found 4 identical CPUs
Extended Family: 0 Extended Model: 2 Family: 6 Model: 37 Stepping: 2
Type: 0 (Original OEM)
CPU Model (x86info's best guess): Core i7 (Nehalem) [Clarkdale/Arrandale]
Processor name string (BIOS programmed): Intel(R) Core(TM) i3 CPU M 350 @ 2.27GHz
Performance MSRs:
/dev/cpu/0/msr: No such file or directory
eax in: 0x00000000, eax = 0000000b ebx = 756e6547 ecx = 6c65746e edx = 49656e69
eax in: 0x00000001, eax = 00020652 ebx = 00100800 ecx = 0098e3bd edx = bfebfbff
eax in: 0x00000002, eax = 55035a01 ebx = 00f0b2dd ecx = 00000000 edx = 09ca212c
eax in: 0x00000003, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000
eax in: 0x00000004, eax = 1c004121 ebx = 01c0003f ecx = 0000003f edx = 00000000
eax in: 0x00000005, eax = 00000040 ebx = 00000040 ecx = 00000003 edx = 00001120
eax in: 0x00000006, eax = 00000005 ebx = 00000002 ecx = 00000001 edx = 00000000
eax in: 0x00000007, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000
eax in: 0x00000008, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000
eax in: 0x00000009, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000
eax in: 0x0000000a, eax = 07300403 ebx = 00000004 ecx = 00000000 edx = 00000603
eax in: 0x0000000b, eax = 00000001 ebx = 00000002 ecx = 00000100 edx = 00000000
eax in: 0x80000000, eax = 80000008 ebx = 00000000 ecx = 00000000 edx = 00000000
eax in: 0x80000001, eax = 00000000 ebx = 00000000 ecx = 00000001 edx = 28100000
eax in: 0x80000002, eax = 65746e49 ebx = 2952286c ecx = 726f4320 edx = 4d542865
eax in: 0x80000003, eax = 33692029 ebx = 55504320 ecx = 20202020 edx = 4d202020
eax in: 0x80000004, eax = 30353320 ebx = 20402020 ecx = 37322e32 edx = 007a4847
eax in: 0x80000005, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000
eax in: 0x80000006, eax = 00000000 ebx = 00000000 ecx = 01006040 edx = 00000000
eax in: 0x80000007, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000100
eax in: 0x80000008, eax = 00003024 ebx = 00000000 ecx = 00000000 edx = 00000000
Cache info
L1 Instruction cache: 32KB, 4-way associative. 64 byte line size.
L1 Data cache: 32KB, 8-way associative. 64 byte line size.
L2 (MLC): 256KB, 8-way associative. 64 byte line size.
TLB info
Instruction TLB: 2MB or 4MB pages, fully associative, 7 entries
Instruction TLB: 4K pages, 4-way associative, 64 entries.
Data TLB: 4KB or 4MB pages, fully associative, 32 entries.
Data TLB: 4KB pages, 4-way associative, 64 entries
Data TLB: 4K pages, 4-way associative, 512 entries.
64 byte prefetching.
Found unknown cache descriptors: dd
Feature flags:
fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflsh ds acpi mmx fxsr sse sse2 ss ht tm pbe sse3 dtes64 monitor ds-cpl vmx est tm2 ssse3 cx16 xTPR pdcm sse4_1 sse4_2 popcnt
Extended feature flags:
xd rdtscp em64t lahf_lm dts arat nonstop_tsc
Long NOPs supported: yes
Address sizes : 36 bits physical, 48 bits virtual
2.25GHz processor (estimate).
Total processor threads: 4
This system has 1 dual-core processor with hyper-threading (2 threads per core) running at an estimated 2.25GHz
0 root@edge: ~
Fri Jun 22, 08:14 #
[/CODE]
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, di gcc 4.6.3 kl diset march=native cpu sj didetek jd kok corei7 yah , kl baca2 refernsi utk i3 mach=core2 , dr awal build sy set flag march=native di make.conf
